DocumentCode
1977263
Title
A new methodology for IC-package thermal co-analysis in 3D IC environment
Author
Pan, Stephen H. ; Chang, Norman ; Zheng, Ji
Author_Institution
Apache Design Solutions, San Jose, CA, USA
fYear
2010
fDate
7-9 Dec. 2010
Firstpage
1
Lastpage
4
Abstract
Power on chip is highly temperature dependent in deep sub-micron VLSI. With increasing power density in modern 3D-IC and SiP, thermal induced reliability and performance issues such as leakage power and electromigration must be taken into consideration in the system level design. This paper presents a new methodology to accurately and efficiently predict power and temperature distribution for 3D ICs.
Keywords
VLSI; electromigration; integrated circuit packaging; integrated circuit reliability; thermal analysis; three-dimensional integrated circuits; 3D IC environment; IC-package thermal coanalysis; deep submicron VLSI; electromigration; leakage power; power density; thermal induced reliability; Analytical models; Heating; Integrated circuit modeling; Metals; Thermal analysis; Three dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Design of Advanced Packaging & Systems Symposium (EDAPS), 2010 IEEE
Conference_Location
Singapore
ISSN
2151-1225
Print_ISBN
978-1-4244-9068-4
Electronic_ISBN
2151-1225
Type
conf
DOI
10.1109/EDAPS.2010.5683029
Filename
5683029
Link To Document