A fuzzy logic controller with reconfigurable, cascadable architecture

Author

Dettloff, Wayne D. ; Yount, Kathy E. ; Watanabe, Hiroyuki

Author_Institution

Microelectron. Center of North Carolina, Research Triangle Park, NC, USA

fYear

1989

fDate

2-4 Oct 1989

Firstpage

474

Lastpage

478

Abstract

A general-purpose fuzzy logic inference engine for real-time control applications has been designed and fabricated in a 1-μm, 3.3-V, DLM CMOS technology. Up to 102 rules are processed in parallel with a single 688 K transistor device. Features include a dynamically reconfigurable and cascadable architecture, a TTL-compatible host interface, laser programmed redundancy, a special mode for testability, RAM rule storage, and on-chip fuzzification and defuzzification

Keywords

CMOS integrated circuits; cascade networks; fuzzy logic; inference mechanisms; microcontrollers; 1 micron; 3.3 V; DLM CMOS technology; RAM rule storage; TTL-compatible host interface; cascadable architecture; dynamically reconfigurable architecture; fuzzy logic controller; fuzzy logic inference engine; laser programmed redundancy; on-chip defuzzification; on-chip fuzzification; parallel processing; real-time control applications; testability mode; transistor device; Automatic control; CMOS technology; Engines; Expert systems; Fuzzy logic; Fuzzy sets; Humans; Process control; Read-write memory; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on

Conference_Location

Cambridge, MA

Print_ISBN

0-8186-1971-6

Type

conf

DOI

10.1109/ICCD.1989.63411

Filename

63411