DocumentCode :
1978104
Title :
A 32-bit RISC microcontroller with 448K bytes of embedded flash memory
Author :
Kuo, Clinton ; Chrudimsky, Dave ; Jew, Thomas ; Gallun, Chad ; Choy, Jon ; Wang, Bill ; Pessoney, Sandy ; Choe, Henry ; Harrington, Cheri ; Eguchi, Richard ; Strauss, Tim ; Prinz, Erwin ; Swift, Craig
Author_Institution :
Powertrain Syst. Div., Motorola Inc., Austin, TX, USA
fYear :
1998
fDate :
22-24 Jun 1998
Firstpage :
28
Lastpage :
33
Abstract :
This paper describes a sub-half micron embedded flash EEPROM developed for high speed microcontroller applications. A 32-bit RISC microcontroller with 448 kbytes (3.67 Mbits) of embedded flash EEPROM is presented. High density flash memory is achieved by utilizing a single transistor NOR type cell that employs Fowler-Nordheim electron tunneling for both program and erase. The high density flash EEPROM is integrated into a high performance logic process with dual gate oxides for high performance and high voltage transistors. The array program time is greatly reduced by employing a highly parallel program operation, and data throughput is greatly enhanced by a page mode operation. Operating at 40 MHz, the embedded flash memory has an on-chip off-page access time of under 38 ns and on-page access time of under 13 ns
Keywords :
PLD programming; dielectric thin films; embedded systems; flash memories; integrated circuit design; logic design; microcontrollers; microprogramming; reduced instruction set computing; tunnelling; 13 ns; 32 bit; 38 ns; 40 MHz; 448 kbyte; Fowler-Nordheim electron tunneling erase process; Fowler-Nordheim electron tunneling program process; RISC microcontroller; Si; SiO2-Si; array program time; data throughput; dual gate oxides; embedded flash EEPROM; embedded flash memory; flash EEPROM; flash memory density; high speed microcontroller; high voltage transistors; logic process; on-chip off-page access time; on-page access time; page mode operation; parallel program operation; single transistor NOR type cell; Costs; EPROM; Electrons; Flash memory; Flash memory cells; Microcontrollers; Nonvolatile memory; Reduced instruction set computing; Tunneling; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nonvolatile Memory Technology Conference, 1998. 1998 Proceedings. Seventh Biennial IEEE
Conference_Location :
Albuquerque, NM
Print_ISBN :
0-7803-4518-5
Type :
conf
DOI :
10.1109/NVMT.1998.723213
Filename :
723213
Link To Document :
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