Title :
High mobility CMOS technologies using III-V/Ge channels on Si platform
Author :
Takagi, Shinichi ; Takenaka, Mitsuru
Author_Institution :
A Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
Abstract :
MOSFETs using channel materials with high mobility and low effective mass have been regarded as strongly important for obtaining high current drive and low supply voltage CMOS under sub 10 nm regime. From this viewpoint, attentions have recently been paid to Ge and III-V channels. In this paper, possible solutions for realizing III-V/Ge MOSFETs on the Si platform are presented. The high quality III-V channel formation on Si substrates can be realized through direct wafer bonding. The gate stack formation is constructed on a basis of atomic layer deposition (ALD) Al2O3 gate insulators for both InGaAs and Ge MOSFETs. As the source/drain (S/D) formation, Ni-based metal S/D is implemented for both InGaAs and Ge MOSFETs. By combining these technologies, we demonstrate successful integration of InGaAs-OI nMOSFETs and Ge p-MOSFETs on a same wafer and their superior device performance.
Keywords :
CMOS integrated circuits; III-V semiconductors; MOSFET; aluminium compounds; atomic layer deposition; elemental semiconductors; gallium arsenide; germanium; indium compounds; nickel; silicon; wafer bonding; ALD; Al2O3; Ge; III-V channel formation; InGaAs; Ni; S/D formation; Si; atomic layer deposition; channel material; gate insulator; gate stack formation; high mobility CMOS technology; low effective mass; low supply voltage CMOS; nMOSFET; p-MOSFET; size 10 nm; source/drain formation; wafer bonding; Ge; III-V semiconductors; MOSFETs; gate stack; integration; metal source/drain; mobility;
Conference_Titel :
Ultimate Integration on Silicon (ULIS), 2012 13th International Conference on
Conference_Location :
Grenoble
Print_ISBN :
978-1-4673-0191-6
Electronic_ISBN :
978-1-4673-0190-9
DOI :
10.1109/ULIS.2012.6193342