DocumentCode :
1978287
Title :
Mechanisms of high hole mobility in (100) nanowire pMOSFETs with width of less than 10nm
Author :
Nomura, Hirotoshi ; Suzuki, Ryota ; Kutsuki, Tomohiro ; Saraya, Takuya ; Hiramoto, Toshiro
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
fYear :
2012
fDate :
6-7 March 2012
Firstpage :
41
Lastpage :
44
Abstract :
The mechanism of high mobility in <;110>;-directed nanowire pMOSFETs with height of 10nm on (100) SOI substrate is investigated. The 9nm-wide nanowire pFET has higher mobility than the (100) universal mobility at 300K The temperature dependence measurements of hole mobility show that the high mobility in nanowire pFET originates from the effect of (110) side surface of the nanowire. On the other hand, it is shown that the degraded mobility in 4nm-wide nanowire pFET is caused by the increase in surface roughness scattering.
Keywords :
MOSFET; nanowires; silicon-on-insulator; surface roughness; SOI substrate; high hole mobility; nanowire pMOSFET; size 10 nm; size 4 nm; size 9 nm; surface roughness scattering; Electron devices; Logic gates; Rough surfaces; Scattering; Silicon; Surface roughness; Temperature dependence; nanowire MOSFET; phonon scattering; surface roughness scattering; universal mobility;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Ultimate Integration on Silicon (ULIS), 2012 13th International Conference on
Conference_Location :
Grenoble
Print_ISBN :
978-1-4673-0191-6
Electronic_ISBN :
978-1-4673-0190-9
Type :
conf
DOI :
10.1109/ULIS.2012.6193352
Filename :
6193352
Link To Document :
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