DocumentCode :
1978289
Title :
Universal scheduler design on uniprocessors in supervisory control of discrete-event systems framework
Author :
Janarthanan, Vasudevan ; Gohari, Peyman
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que.
fYear :
2005
fDate :
28-31 Aug. 2005
Firstpage :
916
Lastpage :
921
Abstract :
This paper presents a framework for designing universal schedulers for real-time systems on uniprocessors based on supervisory control theory (SCT) for discrete-event systems. A universal scheduler nondeterministically selects a task for execution in such a way that all timing constraints are met in a minimally restrictive fashion, while it contains all feasible deterministic scheduling policies
Keywords :
control systems; discrete event systems; processor scheduling; real-time systems; SCT; deterministic scheduling policy; discrete-event system; real-time system; supervisory control theory; timing constraint; uniprocessor; universal scheduler design; Automatic control; Control system synthesis; Delay; Design engineering; Discrete event systems; Processor scheduling; Real time systems; Resource management; Supervisory control; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control Applications, 2005. CCA 2005. Proceedings of 2005 IEEE Conference on
Conference_Location :
Toronto, Ont.
Print_ISBN :
0-7803-9354-6
Type :
conf
DOI :
10.1109/CCA.2005.1507246
Filename :
1507246
Link To Document :
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