• DocumentCode
    1978719
  • Title

    The impact of gate length scaling on UTBOX FDSOI devices: The digital/analog performance of extension-less structures

  • Author

    Nicoletti, T. ; Santos, S. ; Almeida, L. ; Martino, J.A. ; Aoulaiche, M. ; Veloso, A. ; Jurczak, M. ; Simoen, E. ; Claeys, C.

  • Author_Institution
    LSI/PSI, Univ. of Sao Paulo, Sao Paulo, Brazil
  • fYear
    2012
  • fDate
    6-7 March 2012
  • Firstpage
    121
  • Lastpage
    124
  • Abstract
    In this paper we explore, from DC measurements, the impact of gate length scaling on the main digital/analog parameters of Ultra-Thin Buried Oxide (UTBOX) Fully Depleted Silicon-on-Insulator (FDSOI) devices at different temperatures. Standard junction reference devices are compared with the extension-less ones where the latter present superior characteristics for smaller device lengths such as improved DIBL, SS and IGIDL apart from the higher Ion/Ioff ratio, VEA and AV. The temperature tends to degrade all the device parameters although the extension-less structures show to be less susceptible to its influence.
  • Keywords
    buried layers; semiconductor device models; silicon-on-insulator; DC measurement; DIBL; IGIDL; SS; UTBOX FDSOI device; digital-analog performance; extension-less structure; fully depleted silicon-on-insulator; gate length scaling; standard junction reference device; ultra-thin buried oxide; Degradation; Electric fields; Junctions; Logic gates; Performance evaluation; Temperature; Threshold voltage; FDSOI; UTBOX; extension-less; temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Ultimate Integration on Silicon (ULIS), 2012 13th International Conference on
  • Conference_Location
    Grenoble
  • Print_ISBN
    978-1-4673-0191-6
  • Electronic_ISBN
    978-1-4673-0190-9
  • Type

    conf

  • DOI
    10.1109/ULIS.2012.6193372
  • Filename
    6193372