DocumentCode :
1978753
Title :
ZONA — An adaptable NoC-based multiprocessor addressed to education on system-on-chip design
Author :
Silva, Ivan Saraiva ; Fernandes, Silvio R. ; Casillo, Leonardo A.
Author_Institution :
Dept. of Inf. & Stat., Fed. Univ. of Piaui, Teresina, Brazil
fYear :
2011
fDate :
5-6 June 2011
Firstpage :
108
Lastpage :
111
Abstract :
The design of multiprocessor system-on-chip (MP-SoC), especially NoC-based system-on-chip is a relatively new issue not yet adequately addressed in undergraduate curricula and textbooks. In this paper we propose a didactic architecture for a NoC-based multiprocessor system-on-chip using a Reconfigurable Instruction Set Processor (RISP) as homogeneous processing element. A simple assembly language was designed and an assembler tool was written aiming to make simpler the development of MP-SoC applications. All the components were designed in VHDL and prototyped using Altera DE2 board.
Keywords :
computer aided instruction; electronic engineering education; instruction sets; integrated circuit design; microprocessor chips; multiprocessing systems; network-on-chip; Altera DE2 board; VHDL; ZONA; adaptable NoC-based multiprocessor; assembler tool; assembly language; homogeneous processing element; multiprocessor system-on-chip; reconfigurable instruction set processor; system-on-chip design; Computer architecture; Field programmable gate arrays; Multiprocessing systems; Protocols; Registers; System-on-a-chip; USA Councils; Educational platform; MP-SoC; NOC; adaptable processor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Systems Education (MSE), 2011 IEEE International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-0548-9
Electronic_ISBN :
978-1-4577-0550-2
Type :
conf
DOI :
10.1109/MSE.2011.5937106
Filename :
5937106
Link To Document :
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