Title :
Hardware-efficient non-decimation RF sampling receiver front-end with reconfigurable FIR filtering
Author :
Choi, Jaeyoung ; Im, Donggu ; Kim, Bum-Kyum ; Lee, Kwyro
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea
Abstract :
A hardware-efficient non-decimation RF sampling receiver front-end with reconfigurable finite impulse response (FIR) filtering is proposed for multi-band and multi-standard receivers. By adopting a moving average filtering with the charge accumulation, the hardware complexity of the non-decimation filter is only proportional to the number of taps. This makes the proposed non-decimation sampling filter suitable for high-frequency and high-selectivity sampling filters. With a sampling frequency of 1 GHz, a conversion gain of 20 dB and a cascaded NF of 7.5 dB are obtained at the output. The non-decimation FIR filter enhances out-of-band linearity by 10 dB, while suppressing aliasing by 55 dB. The chip is implemented using a 0.18-μm SOI CMOS technology and occupies 0.7 mm2.
Keywords :
CMOS integrated circuits; FIR filters; radio receivers; silicon-on-insulator; SOI CMOS technology; Si; aliasing suppression; charge accumulation; frequency 1 GHz; gain 20 dB; hardware complexity; hardware-efficient nondecimation RF sampling receiver front-end; high-frequency sampling filter; high-selectivity sampling filter; moving average filtering; multiband receiver; multistandard receiver; noise figure 7.5 dB; nondecimation FIR filter; nondecimation sampling filter; out-of-band linearity; reconfigurable FIR filtering; reconfigurable finite impulse response; sampling frequency; size 0.18 mum; Capacitors; Clocks; Finite impulse response filter; Hardware; Radio frequency; Receivers;
Conference_Titel :
ESSCIRC (ESSCIRC), 2012 Proceedings of the
Conference_Location :
Bordeaux
Print_ISBN :
978-1-4673-2212-6
Electronic_ISBN :
1930-8833
DOI :
10.1109/ESSCIRC.2012.6341305