Title :
A Compact Circuit Model of On-Chip Multi-layer Spiral Inductors on Silicon Substrate
Author :
Xie, Jian-Yong ; Yin, Wen-Yan ; Shi, Jing-Lin ; Kang, Kai ; Mao, Jun-Fa
Author_Institution :
Sch. of Electron. Inf. & Electr. Eng., Shanghai Jiao Tong Univ., Shanghai
Abstract :
A compact circuit model for predicting performance parameters of multi-layer inductors is proposed in this paper. This model, which does not use any fitting and optimized parameters, modeled eddy currents loss in the silicon substrate, skin and proximity effects in metal tracks, which is combined with partial element equivalent circuit (PEEC) method. Excellent agreements are obtained between the modeled and measured inductance and Q-factor of fabricated multi-layer spiral inductors up to 20 GHz.
Keywords :
Q-factor; eddy current losses; equivalent circuits; inductors; Q-factor; compact circuit model; eddy currents loss; onchip multi-layer spiral inductors; partial element equivalent circuit; silicon substrate; Eddy currents; Equivalent circuits; Inductance measurement; Inductors; Optimization methods; Predictive models; Proximity effect; Silicon; Skin; Spirals; Multi-layer spiral inductor; eddy current; partial element equivalent circuit (PEEC); proximity effect; skin effect;
Conference_Titel :
Microwave Conference, 2007. APMC 2007. Asia-Pacific
Conference_Location :
Bangkok
Print_ISBN :
978-1-4244-0748-4
Electronic_ISBN :
978-1-4244-0749-1
DOI :
10.1109/APMC.2007.4555009
