• DocumentCode
    1980515
  • Title

    Hybrid ferromagnet-semiconductor gates for nonvolatile memory

  • Author

    Johnson, Mark ; Bennett, Brian R. ; Yang, M.J. ; Miller, M.M. ; Shanabrook, B.V.

  • Author_Institution
    Naval Res. Lab., Washington, DC, USA
  • fYear
    1998
  • fDate
    22-24 Jun 1998
  • Firstpage
    78
  • Lastpage
    83
  • Abstract
    A novel magnetoelectronic device for nonvolatile memory applications is presented, and characteristics of a nonvolatile random access memory (NRAM) cell are discussed. In contrast with a magnetoresistive approach, this device uses a single bistable ferromagnetic layer which is electrically isolated from a microstructured semiconducting Hall cross. A micron scale prototype has demonstrated binary output states of 0 and 100 mV (0 and 20 Ω) at room temperature. A submicron cell, with a 0.5 μm by 2.8 μm Permalloy element, has been fabricated and demonstrated excellent properties. Initial sets of prototypes have been fabricated on high mobility III-V semiconductor heterostructures, but the device concept can be used with Si. This novel approach has several advantages. The basic device is a simple bilayer, requiring only two lithographic levels and a single alignment. It is compatible with GaAs or CMOS processing, and device isolation can be readily achieved using Schottky diodes. The simplicity of the device places minimal requirements on fabrication of the ferromagnetic element, and evidence from prototypes suggests high yield. Signal levels are high, and the device shows inverse scalability: smaller devices have improved output characteristics
  • Keywords
    Hall effect devices; Schottky diodes; ferroelectric storage; ferromagnetic materials; integrated circuit yield; integrated memory circuits; isolation technology; micromachining; random-access storage; 0.5 micron; 100 mV; 2.8 micron; CMOS processing compatibility; FeNi; GaAs; GaAs processing compatibility; NRAM; Permalloy element; Schottky diode device isolation; Si; bilayer device; binary output states; bistable ferromagnetic layer; device inverse scalability; device yield; electrical isolation; ferromagnetic element fabrication; high mobility III-V semiconductor heterostructures; hybrid ferromagnet-semiconductor gates; lithographic levels; magnetoelectronic device; microstructured semiconducting Hall cross; nonvolatile RAM cell; nonvolatile memory; nonvolatile memory applications; nonvolatile random access memory cell; single alignment process; CMOS process; Gallium arsenide; III-V semiconductor materials; Magnetoelectronics; Magnetoresistance; Nonvolatile memory; Prototypes; Random access memory; Semiconductivity; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nonvolatile Memory Technology Conference, 1998. 1998 Proceedings. Seventh Biennial IEEE
  • Conference_Location
    Albuquerque, NM
  • Print_ISBN
    0-7803-4518-5
  • Type

    conf

  • DOI
    10.1109/NVMT.1998.723225
  • Filename
    723225