Title :
Gate capacitance optimization for arrays of carbon nanotube field-effect transistors
Author :
Xinlin Wang ; Wong, H.-S.P. ; Oldiges, P. ; Miller, R.J.
Author_Institution :
Microelectron. Div., IBM Semicond. Res. & Dev. Center, Hopewell Junction, NY, USA
Abstract :
In this paper, three different gate electrode configurations of CNFETs are studied by calculating the capacitance per tube of carbon nanotube arrays. We then show, that an optimal design point can be found a practical configuration.
Keywords :
capacitance; carbon nanotubes; electrodes; field effect transistors; C; carbon nanotube arrays; carbon nanotube field-effect transistors; gate capacitance; gate electrode; CNTFETs; Carbon nanotubes; Dielectric constant; Dielectrics and electrical insulation; Electrodes; Electrostatics; MOSFETs; Poisson equations; Quantum capacitance; Research and development;
Conference_Titel :
Device Research Conference, 2003
Conference_Location :
Salt Lake City, UT, USA
Print_ISBN :
0-7803-7727-3
DOI :
10.1109/DRC.2003.1226885