Title :
A power reduction technique with object code merging for application specific embedded processors
Author :
Ishihara, Tohru ; Yasuura, Hiroto
Author_Institution :
Dept. of Comput. Sci. & Commun. Eng., Kyushu Inst. of Technol., Fukuoka, Japan
Abstract :
In this paper, a power reduction technique which merges frequently executed sequences of object codes into a set of single instructions is proposed. The merged sequence of object codes is restored by an instruction decompressor before decoding the object codes. The decompressor is implemented by a ROM. In many programs, only a few sequences of object codes are frequently executed. Therefore, merging these frequently executed sequences into a single instruction leads to a significant energy reduction. Our experiments with actual read only memory (ROM) modules and some benchmark program demonstrate significant energy reductions up to more than 65% at best case over an instruction memory without the object code merging
Keywords :
application specific integrated circuits; cache storage; circuit optimisation; embedded systems; integer programming; low-power electronics; microprocessor chips; application specific embedded processors; energy reductions; frequently executed sequences; instruction decompressor; instruction memory; object code merging; power reduction technique; Application software; Computer science; Decoding; Energy consumption; Image restoration; Information science; Merging; Power engineering and energy; Read only memory; System-on-a-chip;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
DOI :
10.1109/DATE.2000.840849