Hardware/software Co-design for near real time enhancement of remote sensing imaging

In this paper, we propose a novel hardware/software co-design architecture of an iterative fixed-point projection regularization algorithm for near real time implementation of high-resolution reconstruction of remote sensing (RS) imagery. The proposed technique design is based on a field programmable gate array (FPGA) and implements the image enhancement/reconstruction tasks in an efficient concurrent processing architecture that meets the (near) real time imaging systems requirements in spite of conventional computations. Finally, we report and discuss the results of the Hardware/Software co-design implementation in a Xilinx Virtex-4 XC4VSX35-10ff668 for reconstruction of large scale real world RS images of 1K times 1K pixel format.