DocumentCode :
1982015
Title :
Time jitter analysis of 1-bit sigma-delta synthesizer
Author :
Abu, Avi ; Lupa, Israel
Author_Institution :
Elta Syst., Ashdod, Israel
fYear :
2004
fDate :
6-7 Sept. 2004
Firstpage :
11
Lastpage :
13
Abstract :
We introduce a general analysis of time jitter in a sigma-delta synthesizer. One of the practical applications of a 1-bit sigma-delta systems is generation of a high-resolution local oscillator (LO). LO signals in transmit/receive circuits are typically generated using synthesizers, direct-digital synthesis (DDS), etc. In order to generate LO signals, one may use a single-bit sigma-delta technique to encode sine waves. Due to hardware constraints, the sigma-delta output is generally injected into a frequency multiplier system in order to generate high frequency LO signals. Today, direct generation of a high frequency sinewave using a clock with higher frequency is possible. We analyze these different techniques and develop some robust tools that help to create a practical way of computation to decide how to choose the best configuration under minimum degradation of signal-to-noise ratio (SNR) at the output of the LO generator system.
Keywords :
delta-sigma modulation; frequency synthesizers; network analysis; timing jitter; DAC; SNR; direct-digital synthesis; frequency multiplier; high-resolution local oscillator; receive circuits; sigma-delta modulation; signal-to-noise ratio; sine waves; single-bit sigma-delta synthesizer; time jitter analysis; transmit circuits; Circuit synthesis; Clocks; Delta-sigma modulation; Frequency; Hardware; Jitter; Local oscillators; Signal generators; Signal synthesis; Synthesizers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Electronics Engineers in Israel, 2004. Proceedings. 2004 23rd IEEE Convention of
Print_ISBN :
0-7803-8427-X
Type :
conf
DOI :
10.1109/EEEI.2004.1361075
Filename :
1361075
Link To Document :
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