DocumentCode
1982024
Title
A memory architecture with 4-address configurations for video signal processing
Author
Chang, Sunho ; Kim, Jong-Sun ; Kim, Lee-Sup
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fYear
2000
fDate
2000
Firstpage
746
Abstract
A memory architecture with four-address configurations is proposed for video signal processing. The implemented 8-words × 64-bits 8-port SRAM has 256-bit simultaneous data accessibility by horizontal and vertical address configurations and has 25.6 Gbits/s of high bandwidth
Keywords
SRAM chips; memory architecture; video signal processing; 25.6 Gbit/s; 64 bit; SRAM; bandwidth; four-address configurations; horizontal address configurations; memory architecture; simultaneous data accessibility; vertical address configurations; video signal processing; Bandwidth; Benchmark testing; CMOS technology; Clocks; Digital signal processing; Electronic switching systems; Logic; Performance evaluation; Random access memory; Video signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840879
Filename
840879
Link To Document