DocumentCode
1982036
Title
Automatic synthesis of a digital circuit employing an algorithm
Author
Neyfakh, Albert E.
fYear
2004
fDate
6-7 Sept. 2004
Firstpage
14
Lastpage
17
Abstract
Automatic synthesis of a digital circuit employing an algorithm can be useful for several applications where speed is a vital issue. The digital circuit diagram is provided in AND, OR, NOT and NAND logical bases. The synthesis employs DFG (data flow graph) directed cycles to determine the theoretically optimal insertion of latch setting. The computer program performs the actual synthesis and reduces the effect of human errors. The subalgorithms case is also solved.
Keywords
circuit CAD; data flow graphs; digital circuits; flip-flops; logic CAD; logic circuits; automatic digital circuit synthesis; data flow graph directed cycles; digital circuit diagram; latches; logical bases; Application software; Circuit synthesis; Clocks; Delay; Digital circuits; Flowcharts; Humans; IEEE members; Latches; Logic circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Electronics Engineers in Israel, 2004. Proceedings. 2004 23rd IEEE Convention of
Print_ISBN
0-7803-8427-X
Type
conf
DOI
10.1109/EEEI.2004.1361076
Filename
1361076
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