DocumentCode
1982052
Title
A hardware platform for VLIW based emulation of digital designs
Author
Haug, G. ; Kebschull, U. ; Rosenstiel, W.
Author_Institution
Forschungszentrum Inf., Karlsruhe, Germany
fYear
2000
fDate
2000
Firstpage
747
Abstract
The concept of a very long instruction word (VLIW) processor based system to emulate synthesized RT-level descriptions has often been presented. The RAVE System (RT-Architecture-VLIW-Emulator) overcomes many of the problems common to FPGA based emulation and prototyping systems. Particularly, these are area problems in conjunction with large data paths, long turnaround times and low emulation clock frequencies. This abstract briefly describes the hardware of the RAVE System
Keywords
development systems; field programmable gate arrays; high level synthesis; multiprocessing systems; RAVE System; RT-Architecture-VLIW-Emulator; VLIW based emulation; area problems; data paths; digital designs; emulation clock frequencies; hardware platform; prototyping systems; synthesized RT-level descriptions; turnaround times; very long instruction word; Assembly; Clocks; Digital signal processing; Emulation; Field programmable gate arrays; Hardware; High level synthesis; Instruments; Synchronization; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840880
Filename
840880
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