DocumentCode :
1982347
Title :
A single phase latch for high speed GaAs domino circuits
Author :
Nooshabadi, Saeid ; Montiel-Nelson, J.A. ; Nunez, A.
Author_Institution :
Sch. of Eng., Tasmania Univ., Hobart, Tas.
fYear :
2000
fDate :
2000
Firstpage :
760
Abstract :
A single phase latch (SPL) suitable for GaAs domino logic gates and compatible with DCFL is presented. Two versions of the SPL are reported in this work: single ended SPL used in pure domino logic and differential SPL used in dynamic cascode voltage switch logic. SPL is compared with other common GaAs dynamic circuits and latches. The results demonstrate that SPL is superior in terms of device count, area, clock rate and power consumption
Keywords :
III-V semiconductors; MOS logic circuits; clocks; flip-flops; gallium arsenide; high-speed integrated circuits; pipeline processing; DCFL compatibility; area; clock rate; device count; differential SPL; dynamic cascode voltage switch logic; high speed domino circuits; power consumption; single ended SPL; single phase latch; Australia; Clocks; Energy consumption; Frequency; Gallium arsenide; Latches; Logic circuits; Logic devices; Microelectronics; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
Type :
conf
DOI :
10.1109/DATE.2000.840893
Filename :
840893
Link To Document :
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