• DocumentCode
    1982977
  • Title

    Metallic contamination in silicon processing

  • Author

    Gorodokin, V. ; Zemlyanov, D.

  • Author_Institution
    Mater. & Surface Sci. Inst., Limerick Univ., Ireland
  • fYear
    2004
  • fDate
    6-7 Sept. 2004
  • Firstpage
    157
  • Lastpage
    160
  • Abstract
    The yield and reliability of integrated circuits suffer significant impact due to metallic contaminations on silicon wafers. Alkali elements, particularly Na and K, introduce mobile charges in the silicon oxide layers. Alkaline earth metals such as Ca, Ba, and Sr cause the decrease of GOI, which affects CMOS performance. Other metals such as Fe, Cu, Ni, Cr, Co, Pt and Ir, dissolve in Si matrix and/or form silicides and, therefore, cause the p-n junction leakage. In this study, metallic contaminations were studied by a number of analytic techniques such as capacitance-voltage bias temperature stress (C-V/BTS), corona oxide characterization of semiconductor (COCOS) metrology, time-of-flight secondary ion mass spectrometry (TOF-SIMS), dynamic-SIMS (D-SIMS), vapour phase decomposition combined with inductively coupled plasma-mass spectrometry (VPD/ICP-MS), and VPD combined with total reflection X-ray fluorescence (VPD/TXRF) analysis, and surface photo-voltage (SPV). Na, K, Li, Ca, and Fe contaminations were found to originate from clean-room gloves.
  • Keywords
    CMOS integrated circuits; X-ray fluorescence analysis; barium; calcium; chromium; clean rooms; cobalt; contamination; copper; integrated circuit reliability; integrated circuit yield; iridium; iron; lithium; nickel; p-n junctions; platinum; potassium; secondary ion mass spectroscopy; silicon; sodium; strontium; surface photovoltage; time of flight mass spectroscopy; Ba; C-V/BTS; CMOS performance; COCOS metrology; Ca; Co; Cr; Cu; D-SIMS; Fe; Ir; K; Li; Na; Ni; Pt; SPV; Si; Sr; TOF-SIMS; VPD/ICP-MS; VPD/TXRF analysis; alkali elements; alkaline earth metals; capacitance-voltage bias temperature stress; clean-room gloves; corona oxide characterization of semiconductor; dynamic-SIMS; inductively coupled plasma-mass spectrometry; integrated circuit reliability; integrated circuit yield; metallic contaminations; p-n junction leakage; silicon wafers; surface photo-voltage; time-of-flight secondary ion mass spectrometry; total reflection X-ray fluorescence; vapour phase decomposition; Capacitance-voltage characteristics; Contamination; Earth; Integrated circuit reliability; Integrated circuit yield; Iron; Mass spectroscopy; Plasma temperature; Silicon; Strontium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Electronics Engineers in Israel, 2004. Proceedings. 2004 23rd IEEE Convention of
  • Print_ISBN
    0-7803-8427-X
  • Type

    conf

  • DOI
    10.1109/EEEI.2004.1361113
  • Filename
    1361113