Title :
Simultaneous Floating-Point Sine and Cosine for VLIW Integer Processors
Author :
Jeannerod, Claude-Pierre ; Jourdan-Lu, Jingyan
Author_Institution :
INRIA, ENSL, Lab. LIP, Univ. de Lyon, Lyon, France
Abstract :
Graphics and signal processing applications often require that sines and cosines be evaluated at a same floating-point argument, and in such cases a very fast computation of the pair of values is desirable. This paper studies how 32-bit VLIW integer architectures can be exploited in order to perform this task accurately for IEEE single precision (including subnormals). We describe software implementations for sinf, cosf, and sincosf over [-pi/4, pi/4]that have a proven 1-ulp accuracy and whose latency on STMicroelectronics´ ST231 VLIW integer processor is 19, 18, and 19 cycles, respectively. Such performances are obtained by introducing a novel algorithm for simultaneous sine and cosine that combines univariate and bivariate polynomial evaluation schemes.
Keywords :
floating point arithmetic; parallel architectures; polynomials; IEEE single precision; ST231 VLIW integer processor; STMicroelectronics; VLIW integer architecture; bivariate polynomial evaluation scheme; floating-point argument; graphics application; signal processing application; simultaneous floating-point cosine; simultaneous floating-point sine; sincosf; sinf; software implementation; univariate polynomial evaluation scheme; word length 32 bit; Accuracy; Approximation methods; Computer architecture; Polynomials; Program processors; Registers; VLIW; C software implementation; IEEE 754; VLIW integer processor; floating-point arithmetic; instruction level parallelism (ILP); trigonometric function; unit in the last place;
Conference_Titel :
Application-Specific Systems, Architectures and Processors (ASAP), 2012 IEEE 23rd International Conference on
Conference_Location :
Delft
Print_ISBN :
978-1-4673-2243-0
Electronic_ISBN :
2160-0511
DOI :
10.1109/ASAP.2012.12