• DocumentCode
    1983374
  • Title

    An FPGA-based architecture for linear and morphological image filtering

  • Author

    Ramírez, Juan Manuel ; Flores, Emmanuel Morales ; Martínez-Carballido, Jorge ; Enriquez, Rogerio ; Alarcón-Aquino, Vicente ; Báez-lópez, David

  • Author_Institution
    Coordinacion de Electron., Inst. Nac. de Astrofis., Opt. y Electron., Tonantzintla, Mexico
  • fYear
    2010
  • fDate
    22-24 Feb. 2010
  • Firstpage
    90
  • Lastpage
    95
  • Abstract
    Field Programmable Gate Array (FPGA) technology has become a viable target for the implementation of real time algorithms suited to video image processing applications. The unique architecture of the FPGA has allowed the technology to be used in many applications encompassing all aspects of video image processing. Among those algorithms, linear filtering based on a 2D convolution, and non-linear 2D morphological filters, represent a basic set of image operations for a number of applications. In this work, an implementation of linear and morphological image filtering using a FPGA NexysII, Xilinx, Spartan 3E, with educational purposes, is presented. The system is connected to a USB port of a personal computer, which in that way form a powerful and low-cost design station. The FPGA-based system is accessed through a Matlab graphical user interface, which handles the communication setup. A comparison between results obtained from MATLAB simulations and the described FPGA-based implementation is presented.
  • Keywords
    field programmable gate arrays; filtering theory; graphical user interfaces; image processing; real-time systems; 2D convolution linear filtering; FPGA NexysII; FPGA based architecture; Matlab graphical user interface; Spartan 3E; USB port; Xilinx; field programmable gate array; linear image filtering; morphological image filtering; real-time algorithms; video image processing applications; Application software; Convolution; Field programmable gate arrays; Filtering algorithms; Graphical user interfaces; Image processing; Maximum likelihood detection; Microcomputers; Nonlinear filters; Universal Serial Bus; FPGA; Image; filtering; processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Communications and Computer (CONIELECOMP), 2010 20th International Conference on
  • Conference_Location
    Cholula
  • Print_ISBN
    978-1-4244-5352-8
  • Electronic_ISBN
    978-1-4244-5353-5
  • Type

    conf

  • DOI
    10.1109/CONIELECOMP.2010.5440788
  • Filename
    5440788