DocumentCode
1983835
Title
A novel ROM architecture for reducing bubble and metastability errors in high speed flash ADCs
Author
Rahman, Mustafijur ; Baishnab, K.L. ; Talukdar, F.A.
Author_Institution
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol. Silchar, Silchar, India
fYear
2010
fDate
22-24 Feb. 2010
Firstpage
15
Lastpage
19
Abstract
In a flash ADC, output of the comparators constitute the thermometer code. This thermometer code is converted to binary code with the help of a thermometer to binary decoder using a ROM. However, this conversion scheme suffers from metastability and bubble errors. A novel ROM architecture has been proposed which suppresses metastability, both first and second order bubble errors. It eliminates the need of an error correction circuit in the front end of the ROM thereby reducing power consumption, area requirement and removing the delay associated with the additional stage. This architecture also eliminates the need of Gray coded ROM and Gray to binary converter thereby making the circuit simpler.
Keywords
analogue-digital conversion; comparators (circuits); error correction; flash memories; read-only storage; ROM architecture; analog-digital converters; binary converter; bubble error; comparators; error correction circuit; high speed flash ADC; metastability errors; read-only memory; thermometer code; Binary codes; Circuits; Decoding; Delay; Energy consumption; Error correction; Metastasis; Read only memory; Sampling methods; Voltage; CMOS memory circuits; analog digital conversion; bubble error; digital error correction; metastability error;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Communications and Computer (CONIELECOMP), 2010 20th International Conference on
Conference_Location
Cholula
Print_ISBN
978-1-4244-5352-8
Electronic_ISBN
978-1-4244-5353-5
Type
conf
DOI
10.1109/CONIELECOMP.2010.5440805
Filename
5440805
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