An output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction for SoC

This paper presents an output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction (ABSTUR LDR) for SoC power management applications. Techniques of Q-reduction compensation and adaptive biasing (AB) are employed to achieve low-voltage high-recision regulation with enhanced loop bandwidth while maintaining low quiescent current and high current efficiency. A symmetrically matched current-voltage mirror is used to implement the AB scheme, enabling an accurate load current sensing even with the pass transistor working in the linear region that is beneficial for chip-area saving. The dedicated STUR circuit, which is low-voltage compatible and consumes very low current in the steady state, is inserted to momentarily increase the gate discharging current of the pass transistor when the LDR output has a large undershoot due to a large step up of the load current. Features of the proposed ABSTUR LDR are experimentally verified by a prototype fabricated in a standard 0.35-μm CMOS process.