DocumentCode
1984710
Title
Simplified logic design methodology for fuzzy membership function based robust detection of maternal modulus maxima location: A low complexity Fetal ECG extraction architecture for mobile health monitoring systems
Author
Acharyya, Amit ; Maharatna, Koushik ; Al-Hashimi, Bashir M. ; Tudugalle, Hasitha
Author_Institution
Pervasive Syst. Centre, Univ. of Southampton, Southampton, UK
fYear
2011
fDate
15-18 May 2011
Firstpage
77
Lastpage
80
Abstract
This paper proposes a simplified logic design methodology for the fuzzy membership function used for robust and reliable detection of modulus-maxima locations in wavelet domain for fetal ECG extraction from the abdominal composite ECG signal. This simplification is achieved by exploiting the inherent time-position information of the wavelet coefficients decomposed at different resolution levels. Subsequently, a low complexity VLSI architecture for Fetal ECG extraction is presented which is designed using the recently proposed memory- efficient, multiplierless Discrete Wavelet Transform method. The generic memory model within this architecture will provide the flexibility to configure the on-chip memory with any type of orthonormal wavelets suitable for different applications. Total synthesized cell area of the proposed architecture is 14.2 mm2 and power consumption is 101.5 μW at 1.2 V @ 1 MHz frequency using 0.13 μm standard cell technology. The proposed architecture is targeted for the personalized health monitoring applications within a mobile home-care medical device in the resource constrained environment.
Keywords
VLSI; discrete wavelet transforms; electrocardiography; feature extraction; fuzzy logic; medical signal detection; medical signal processing; obstetrics; patient monitoring; signal resolution; VLSI; abdominal composite ECG signalgnal; discrete wavelet transform; frequency 1 MHz; fuzzy membership function; generic memory model; inherent time-position information; low complexity fetal ECG extraction; mobile home-care medical device; on-chip memory; orthonormal wavelets; personalized health monitoring; power 101.5 muW; resolution level; resource constrained environment; robust maternal modulus maxima location detection; simplified logic design; size 0.13 mum; voltage 1.2 V; wavelet coefficient decomposition; Computer architecture; Discrete wavelet transforms; Electrocardiography; Signal resolution; Wavelet analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location
Rio de Janeiro
ISSN
0271-4302
Print_ISBN
978-1-4244-9473-6
Electronic_ISBN
0271-4302
Type
conf
DOI
10.1109/ISCAS.2011.5937505
Filename
5937505
Link To Document