Power amplifier architectures with discrete power control for high average efficiency

This paper focuses and provides experimental data for reconfigurable class-AB power amplifiers capable to adjust their linear power handling capability according with the application requirements. This feature is aimed at optimizing the energy requirement of the PAs. Two architectures and technologies have been considered. The first is based on SiGe HBTs with different sizes, it shows a CW PAE around 38% for the state 1 and 42% for state 2 respectively when terminated with optimum terminations. This circuit is conceived to be involved in a 1-bit step envelope tracking architecture, in which a factor two of improvement in terms of average PAE has been demonstrated. The second technique consists in controlling the output back-off of a GaN HEMT PA resulting in a significant increase of the efficiency through an, in principle, arbitrary power dynamic range. The prototype demonstrated an average PAE enhancement at 7 dB back-off of 2.1 and a maximum linear output power can be achieved up to 30 dBm, when driven by a 2.14 GHz WCDMA signal.