Title :
Computer-aided failure analysis of VLSI circuits using I/sub DDQ/ testing
Author :
Naik, Samir ; Maly, Wojciech
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie-Mellon Univ., Pittsburgh, PA, USA
Abstract :
A new approach to IC diagnosis, based on realistic defect modelling, has been recently proposed. Algorithms have been devised to generate ´good´ diagnostic test sets. In this paper, the authors demonstrate that high levels of diagnostic resolution can be obtained for CMOS random logic, especially when abnormal I/sub DDQ/ current measurements are monitored in addition to circuit output voltages.<>
Keywords :
CMOS integrated circuits; VLSI; circuit analysis computing; electric current measurement; failure analysis; integrated logic circuits; logic testing; CMOS random logic; IC diagnosis; VLSI circuits; circuit output voltages; computer-aided failure analysis; current measurements; diagnostic resolution; diagnostic test sets; CMOS logic circuits; Circuit analysis computing; Circuit testing; Current measurement; Failure analysis; Integrated circuit modeling; Monitoring; Semiconductor device modeling; Very large scale integration; Voltage;
Conference_Titel :
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-8186-3830-3
DOI :
10.1109/VTEST.1993.313300
