DocumentCode
1985166
Title
Carafe: an inductive fault analysis tool for CMOS VLSI circuits
Author
Jee, Alvin ; Ferguson, F. Joel
Author_Institution
California Univ., Santa Cruz, CA, USA
fYear
1993
fDate
6-8 April 1993
Firstpage
92
Lastpage
98
Abstract
Traditional fault models for testing CMOS VLSI circuits do not take into account the actual mechanisms that precipitate faults in CMOS circuits. As a result, tests based on traditional fault models may not detect all the faults that occur in the circuit. This paper discusses the Carafe software package which determines which faults are likely to occur in a circuit based on the circuit´s physical design, defect parameters, and fabrication technology.<>
Keywords
CMOS integrated circuits; VLSI; circuit analysis computing; fault location; integrated circuit technology; software packages; CMOS VLSI circuits; Carafe software package; defect parameters; fabrication technology; fault models; inductive fault analysis tool; physical design; Circuit faults; Circuit simulation; Circuit testing; Fabrication; Integrated circuit packaging; Integrated circuit testing; Logic circuits; Logic testing; Semiconductor device modeling; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location
Atlantic City, NJ, USA
Print_ISBN
0-8186-3830-3
Type
conf
DOI
10.1109/VTEST.1993.313302
Filename
313302
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