Title :
CCSTG: an efficient test pattern generator for sequential circuits
Author :
Kim, Kyuchull ; Saluja, Kewal K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin-Madison Univ., WI, USA
Abstract :
A simple method which combines the efficiencies of an event driven implication method and speed of a compiled code implication is proposed for use in a sequential test pattern generator. This method, in conjunction with several other concepts and heuristics, is used to implement a sequential test pattern generator CCSTG based on the sequential test generation algorithm used in FASTEST. It is shown that the performance of a sequential test pattern generator improves substantially when methods proposed in this paper are incorporated in a test pattern generator. The authors verified this assertion by comparing the performances of test pattern generators, with and without these features, for ISCAS-89 benchmark sequential circuits.<>
Keywords :
automatic testing; integrated circuit testing; logic testing; sequential circuits; CCSTG; FASTEST; ISCAS-89 benchmark; compiled code implication; event driven implication method; heuristics; test pattern generator for sequential circuits; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Discrete event simulation; Logic design; Logic testing; Sequential analysis; Sequential circuits; Test pattern generators;
Conference_Titel :
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-8186-3830-3
DOI :
10.1109/VTEST.1993.313304
