DocumentCode :
1985357
Title :
Input and output encoding techniques for on-line error detection in combinational logic circuits
Author :
Busaba, Fadi Y. ; Lala, Parag K.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear :
1993
fDate :
6-8 April 1993
Firstpage :
48
Lastpage :
54
Abstract :
Presents techniques for designing arbitrary combinational circuits so that any single stuck-at fault will result in either single bit error or unidirectional multibit errors at the output. An input encoding algorithm and an output encoding algorithm that ensure that every fault at the input will either produce single bit error or unidirectional multibit errors at the output are proposed. If there are no input faults which produce bidirectional error, no internal stuck-at fault will result in such an error irrespective of the way the circuit is implemented. The proposed techniques have been applied to MCNC benchmark circuits and the overhead is estimated.<>
Keywords :
VLSI; combinatorial circuits; encoding; error detection codes; fault location; MCNC benchmark circuits; combinational logic circuits; input encoding algorithm; on-line error detection; output encoding algorithm; overhead; single bit error; stuck-at fault; unidirectional multibit errors; Automatic testing; Circuit faults; Circuit testing; Combinational circuits; Computer errors; Condition monitoring; Electrical fault detection; Encoding; Fault detection; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-8186-3830-3
Type :
conf
DOI :
10.1109/VTEST.1993.313309
Filename :
313309
Link To Document :
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