DocumentCode
1985452
Title
An algorithm for a microcontrolled reconfigurable PLA
Author
Ramesh, Tirumale
Author_Institution
Dept. of Electr. Eng., Saginaw Valley State Univ., University Center, MI, USA
fYear
1989
fDate
14-16 Aug 1989
Firstpage
895
Abstract
The PLA (programmable logic array) has become a major subsystem block in the hardware of many systems. A mapping algorithm and hardware for a reconfigurable PLA (RPLA) interfaced to a general purpose microcontroller are described. The functional reconfigurability is achieved by altering the input literal associated with each product and output terms of the function set. The scheme gives a flexibility in realignment of the functions to be implemented
Keywords
application specific integrated circuits; logic arrays; microcontrollers; functional reconfigurability; input literal; mapping algorithm; microcontrolled reconfigurable PLA; output terms; programmable logic array; CMOS logic circuits; CMOS technology; EPROM; Hardware; Microcontrollers; Programmable logic arrays; Read-write memory; Reconfigurable logic; Very large scale integration; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on
Conference_Location
Champaign, IL
Type
conf
DOI
10.1109/MWSCAS.1989.101998
Filename
101998
Link To Document