• DocumentCode
    1985735
  • Title

    Concurrent error correction in iterative circuits by recomputing with partitioning and voting

  • Author

    Al-Asaad, H. ; Czeck, E.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
  • fYear
    1993
  • fDate
    6-8 April 1993
  • Firstpage
    174
  • Lastpage
    177
  • Abstract
    Presents a novel technique for the design of iterative circuits with concurrent error correction capabilities. The new method is called ´recomputing with partitioning and voting´ (RWPV). It uses a combination of hardware and time redundancy to achieve fault tolerance while providing the same error correction capabilities as found in hardware TMR or time redundancy computation. RWPV error correction is obtained with small hardware and time overhead, as compared to over 200% overhead in either hardware or time for TMR or time redundancy.<>
  • Keywords
    error correction; logic arrays; logic testing; redundancy; RWPV; concurrent error correction; fault tolerance; iterative circuits; partitioning; recomputing; time redundancy; voting; Circuits; Computer errors; Costs; Error correction; Fault tolerance; Hardware; Multiplexing; Redundancy; Timing; Voting;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
  • Conference_Location
    Atlantic City, NJ, USA
  • Print_ISBN
    0-8186-3830-3
  • Type

    conf

  • DOI
    10.1109/VTEST.1993.313328
  • Filename
    313328