DocumentCode
1986046
Title
On the maximum value of aliasing probabilities for single input signature registers
Author
Feng, Shou-Ping ; Fujiwara, Toru ; Kasami, Tadao ; Iwasaki, Kazuhiko
Author_Institution
Fac. of Eng. Sci., Osaka Univ., Japan
fYear
1993
fDate
6-8 April 1993
Firstpage
267
Lastpage
274
Abstract
The aliasing error performance of signature registers is measured by the maximum values of the aliasing error probabilities for certain ranges of the bit-error rate (and those of the test length). Based on these measurements, the authors evaluate the performances of all the single input signature registers whose feedback polynomials are primitive polynomials of degree 16 and generator polynomials of the double-error-correcting BCH codes of the same degree. When the degree of the feedback polynomial is large (e.g. 32), it is computationally hard to obtain the exact value of the aliasing probability. But the authors observe that the numbers of codewords with large weights in the corresponding code determine the maximum value of the aliasing probabilities in the range 0>
Keywords
VLSI; built-in self test; error correction codes; logic testing; probability; shift registers; aliasing error performance; aliasing probabilities; bit-error rate; codewords; double-error-correcting BCH codes; exact value; feedback polynomials; maximum value; primitive polynomials; single input signature registers; Automatic testing; Built-in self-test; Circuit testing; Compaction; Feedback circuits; Length measurement; Linear feedback shift registers; Performance evaluation; Polynomials; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1993. Digest of Papers., Eleventh Annual 1993 IEEE
Conference_Location
Atlantic City, NJ, USA
Print_ISBN
0-8186-3830-3
Type
conf
DOI
10.1109/VTEST.1993.313359
Filename
313359
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