• DocumentCode
    1986060
  • Title

    Novel Device structures for Sub-25nm Generation

  • Author

    Yuan, Jun ; Venkaragirish, N. ; Jhaveri, Ritesh ; Tura, Ahmet ; Woo, Jason C S

  • Author_Institution
    Department of Electrical Engineering, University of California, Los Angeles
  • fYear
    2005
  • fDate
    19-21 Dec. 2005
  • Firstpage
    5
  • Lastpage
    7
  • Abstract
    Aggressive MOSFET scaling faces the challenges of limited Ion/loff ratio and severe short channel effects. The problems facing mixed mode circuits are equally daunting. While very high FTand Fmaxcan be realized, these small transistors have unacceptably low intrinsic gain (gmrO). Small supply voltage also posts real constraint in circuits. To overcome these problems, new device configurations made feasible by small dimensions and new materials need to be explored. In this paper, novel devices incorporating silicon and germanium are presented. These silicon and germanium based novel transistors with superior performance have the potential to alleviate the scaling challenges for sub-25nm nodes.
  • Keywords
    Cutoff frequency; Degradation; Doping; Electrodes; Germanium; Los Angeles Council; MOSFET circuits; Silicidation; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
  • Print_ISBN
    0-7803-9339-2
  • Type

    conf

  • DOI
    10.1109/EDSSC.2005.1635191
  • Filename
    1635191