Title :
A review report on low power VLSI systems analysis and modeling techniques
Author :
Klavakolanu, S. R. Sastry ; Raju, M. Kama ; Noorbasha, Fazal ; Kanth, B. Raghu
Author_Institution :
Dept. of ECE, KL Univ., Guntur, India
Abstract :
In the present trend of CMOS IC technology, Low Power Design is a major issue in designing of a system. In order to achieve that criterion, power consumption should be minimized. In this paper, techniques which are available for reduction of power consumption at different abstraction levels are discussed in detail. With this paper, Designer can easily choose the proper methodology with the appropriate optimization technique to achieve the required goal.
Keywords :
CMOS integrated circuits; VLSI; integrated circuit modelling; low-power electronics; power consumption; CMOS IC technology; complementary metal oxide semiconductor integrated circuit; low power VLSI system analysis; modeling technique; optimization technique; power consumption reduction; CMOS integrated circuits; Educational institutions; Logic gates; Optimization; Power demand; Transistors; Very large scale integration; CMOS; GIDL; LOW POWER; VLSI;
Conference_Titel :
Signal Processing And Communication Engineering Systems (SPACES), 2015 International Conference on
Conference_Location :
Guntur
DOI :
10.1109/SPACES.2015.7058234
