Theoretical Efficiency Limits of a Serial and Parallel Linear-Assisted Switching Converter as an Envelope Amplifier

This paper presents a theoretical analysis and an optimization method for envelope amplifiers. Highly efficient envelope amplifiers based on a switching converter in parallel or in series with a linear regulator are analyzed and optimized. The results of the optimization process are shown, and these two architectures are compared regarding their complexity and efficiency. The proposed optimization method is based on the knowledge of the transmitted signal type (OFDM, WCDMA...), and it can be applied to any signal type as long as the envelope probability distribution is known. Finally, it is shown that both analyzed architectures have an inherent efficiency limit.