DocumentCode :
1986478
Title :
CGS(D)/CS(D)GCapacitance Phenomenon of 100nm Fully-Depleted SOI CMOS Devices with HfO2High-K Gate Dielectric Considering Vertical and Fringing Displacement Effects
Author :
Lin, Yu-Sheng ; Lin, Chia-Hong ; Kuo, James B. ; Su, Ker-Wei
Author_Institution :
Dept. of Electrical Eng, BL-528, National Taiwan University, Roosevelt Rd. Sec 4, No. 1, Taipei, Taiwan 106-17
fYear :
2005
fDate :
19-21 Dec. 2005
Firstpage :
95
Lastpage :
98
Abstract :
This paper reports the CGS(D)/CS(D)Gcapacitance phenomenon of 100nm fully-depleted (FD) SOI CMOS devices with HfO2high-k gate dielectric considering vertical and fringing displacement effect. According to the 2D simulation results, a unique two-step CS(D)G/CGSversus VGcurve exists for the device with the 1.5nm HfO2gate dielectric due to the vertical and fringing displacement effects.
Keywords :
CMOS technology; Capacitance; Dielectric devices; Dielectric materials; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; MOS devices; Nanoscale devices; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Print_ISBN :
0-7803-9339-2
Type :
conf
DOI :
10.1109/EDSSC.2005.1635214
Filename :
1635214
Link To Document :
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