DocumentCode :
1987018
Title :
A Low Jitter 0.2 μm PHEMT 20 Gb/s 1:2 Demultiplexer
Author :
Jingfeng Ding ; Zhigong Wang ; Yinghua Qiu ; Gui Wang
Author_Institution :
Instute of RF-& OE-ICs, Southeast University, Nanjing, China. E-mail: dingjingfeng@seu.edu.cn
fYear :
2005
fDate :
19-21 Dec. 2005
Firstpage :
203
Lastpage :
206
Abstract :
An integrated demultiplexer (DEMUX) for ultra high speed optical fiber communication systems has been described. The fabricated DEMUX operates error free at 20 Gb/s by 231-1 pseudorandom bit sequences (PRBS) via on-wafer testing. The measured rms and p-p jitters of the output eye- diagram are just 1.2 ps and 5.6 ps respectively. The chip size is 1.8x0.9 mm2and its power dissipation is 720 mW.
Keywords :
Bandwidth; Capacitors; Circuit synthesis; Clocks; Flip-flops; Inductors; Jitter; Latches; PHEMTs; Shunt (electrical);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Conference_Location :
Howloon, Hong Kong
Print_ISBN :
0-7803-9339-2
Type :
conf
DOI :
10.1109/EDSSC.2005.1635241
Filename :
1635241
Link To Document :
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