DocumentCode :
1987269
Title :
The inconvenient truth about alias rejection in continuous time ΔΣ converters
Author :
Pavan, Shanthi
Author_Institution :
Indian Inst. of Technol. - Madras, Chennai, India
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
526
Lastpage :
529
Abstract :
Continuous-time Delta Sigma Modulators (CTDSM) have "Implicit Anti-Aliasing" is a commonly heard refrain in the data-converter design community. We show that this is not the case when a switched capacitor (SC) feedback DAC is used, thereby nullifying one of the principal advantages of continuous-time operation. We give an intuitive understanding of this phenomenon, and propose a power efficient circuit technique to improve alias rejection.
Keywords :
delta-sigma modulation; switched capacitor networks; alias rejection; continuous time ΔΣ converters; continuous-time delta sigma modulators; implicit anti-aliasing; switched capacitor feedback DAC; Capacitors; Clocks; Frequency modulation; Jitter; Switches; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5937618
Filename :
5937618
Link To Document :
بازگشت