DocumentCode
1987681
Title
Stress estimation in open tungsten TSV
Author
Singulani, A.P. ; Ceric, H. ; Selberherr, Siegfried
Author_Institution
Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria
fYear
2013
fDate
3-5 Sept. 2013
Firstpage
1
Lastpage
4
Abstract
We have studied the residual stress formation in the metal film of a Through Silicon Via (TSV) technology. The film is deposited by a CVD process in the TSV´s wall and a residual stress arises due to this process. Our goal was to develop a methodology to estimate the stress based on growth parameters. The calculation results exhibit a good agreement with experiments, although there is a tendency for stress underestimation.
Keywords
chemical vapour deposition; internal stresses; semiconductor growth; stress analysis; three-dimensional integrated circuits; CVD process; TSV; growth parameters; metal film; open tungsten; residual stress formation; stress estimation; stress underestimation; through silicon via technology; Films; Metals; Residual stresses; Silicon; Through-silicon vias;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on
Conference_Location
Glasgow
ISSN
1946-1569
Print_ISBN
978-1-4673-5733-3
Type
conf
DOI
10.1109/SISPAD.2013.6650575
Filename
6650575
Link To Document