DocumentCode
1987817
Title
A module-sliced approach for high yield VLSI/WSI processors
Author
Chang, Yi-Chieh ; Shin, Kang G.
Author_Institution
Real-Time Comput. Lab., Michigan Univ., Ann Arbor, MI, USA
fYear
1989
fDate
2-4 Oct 1989
Firstpage
500
Lastpage
503
Abstract
The module-sliced approach is realized in a reconfigurable fault-tolerant segmented array processor (RFTSAP). The basic building block of RFTSAP is a node which consists of a processor, local memory, and a programmable I/O unit (PIOU). The PIOU allows any group of processors to be combined to perform the functions of a large processor module. The yield of a large processor module can be improved 2 to 4 times compared to that of approaches not using the module-sliced method
Keywords
VLSI; circuit CAD; fault tolerant computing; PIOU; RFTSAP; VLSI/WSI processors; large processor module; local memory; module-sliced; node; programmable I/O unit; reconfigurable fault-tolerant segmented array processor; Computer architecture; Fault tolerance; Laboratories; Microprocessors; Process control; Redundancy; Registers; Strontium; Switches; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-1971-6
Type
conf
DOI
10.1109/ICCD.1989.63417
Filename
63417
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