• DocumentCode
    1987944
  • Title

    Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs

  • Author

    Alam, Syed Asad ; Gustafsson, Oscar

  • Author_Institution
    Dept. of Electr. Eng., Linkoping Univ., Linkoping, Sweden
  • fYear
    2011
  • fDate
    15-18 May 2011
  • Firstpage
    661
  • Lastpage
    664
  • Abstract
    Frequency-response masking (FRM) is a set of techniques for lowering the computational complexity of narrow transition band FIR filters. These FRM use a combination of sparse periodic filters and non-sparse filters. In this work we consider the implementation of these filters in a time-multiplexed manner on FPGAs. It is shown that the proposed architectures produce lower complexity realizations compared to the vendor provided IP blocks, which do not take the sparseness into consideration. The designs are implemented on a Virtex-6 device utilizing the built-in DSP blocks.
  • Keywords
    FIR filters; computational complexity; digital signal processing chips; field programmable gate arrays; frequency response; FPGA; Virtex-6 device; built-in DSP block; computational complexity; frequency-response masking; narrow transition band FIR filter; nonsparse filter; time-multiplexed sparse periodic FIR filter; Complexity theory; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Pipeline processing; Random access memory; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
  • Conference_Location
    Rio de Janeiro
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4244-9473-6
  • Electronic_ISBN
    0271-4302
  • Type

    conf

  • DOI
    10.1109/ISCAS.2011.5937652
  • Filename
    5937652