FPGA implementation of channel estimation for MIMO-OFDM

In this paper, we propose a new hardware implementation of channel estimation for MIMO-OFDM. Our target is to minimize hardware resource utilization. At first, proper algorithm is chosen in consideration of hardware feature as well as communication theory for fast prototyping. Based on the algorithm, our pipelined architecture performs channel estimation by simple calculation logic without redundancy. Our experimental results show that the proposed implementation saves at least 43 percent of the hardware resources, while achieving the same performance as known baseline implementations. We also show that more channels can be supported by using our proposed architecture.