Symbolic analysis for automatic model generation

This paper presents a methodology for automatically extracting an equivalent circuit model starting from a set of equations. Once the device models are built, they can be easily handled and interconnected. This method therefore proves to be particularly suitable for large system studies using an object oriented implementation. The proposed methodology involves the following steps. The equations are mapped in an equivalent circuit with symbolic parameters and then the resistive companion method (RCM) is applied to build a discrete time equivalent of the system. The procedure is based on the Matlab Symbolic Toolbox and it is able to generate a model according to the specifications of the Virtual Test Bed (VTB) environment. A custom SPICE-like language bias been defined to create the circuit description of the system. The methodology description is enriched with a set of examples.