• DocumentCode
    1988420
  • Title

    lGb/s Ground Referenced Low Voltage Differential Signal I/O Interface in 0.35 μm CMOS

  • Author

    Yu-Sheng Tiao ; Meng-Lieh Sheu ; Yen-Po Chen

  • Author_Institution
    Department of Electrical Engineering, National Chi-Nan University Puli, Taiwan
  • fYear
    2005
  • fDate
    19-21 Dec. 2005
  • Firstpage
    503
  • Lastpage
    506
  • Abstract
    This paper presents a circuit design of ground referenced low voltage differential signal (GLVDS) I/O interface operating at 1 Gb/s. A GLVS transmitter /receiver chip is realized by using TSMC 3.3V 0.35μm 2P4M CMOS process, and its core size is 185μm*85μm.
  • Keywords
    CMOS process; Circuit synthesis; Communication cables; Consumer electronics; Logic; Low voltage; Optical fiber cables; Optical receivers; Optical transmitters; Variable structure systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
  • Conference_Location
    Howloon, Hong Kong
  • Print_ISBN
    0-7803-9339-2
  • Type

    conf

  • DOI
    10.1109/EDSSC.2005.1635318
  • Filename
    1635318
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1988420