A New Failure Mechanism of Gate-grounded MOSFET ESD Device in 9Onm Technology

A new triggering phenomenon was observed on gate-grounded nMOS (ggnMOS) ESD device in 90nm technology. The trigger voltage has been measured at the value as low as 6V. However, the low triggering voltage does not result in high ESD performance as conventional theory suggested. The experimental data and simulation results have shown that this is due to the dislocation of the largest electric field from drain/junction region to the edge of LDD/pocket region. Therefore heating in the smaller LDD/pocket junction causes the early burn out. It is clarified that lower trigger voltage does not always mean to higher ESD endurance.