Impact of priority-based ATM switch design on system performance

Author

Ding, Jianxun ; Jiang, Hong

Author_Institution

Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA

fYear

1993

fDate

27-29 May 1993

Firstpage

128

Lastpage

132

Abstract

We investigate the performance impact of a Banyan type MIN ATM switch with priority-based design and its impact on system performance. The switch design consists of static buffer splitting, adaptive buffer splitting, as well as the priority-based selection strategies for solving cell contentions. A new analytical model is developed for the favorite load traffic pattern which can reflect some typical ATM applications and also include the uniform load as its special case. System performance comparisons are conducted for a number of different priority-based ATM switch designs

Keywords

asynchronous transfer mode; multiprocessor interconnection networks; packet switching; performance evaluation; ATM applications; ATM switch; Banyan type MIN; adaptive buffer splitting; analytical model; asynchronous transfer mode; cell contentions; load traffic pattern; multistage interconnection network; priority-based ATM switch design; priority-based selection strategies; static buffer splitting; system performance; Asynchronous transfer mode; B-ISDN; Buffer storage; Computer science; Fabrics; Pattern analysis; Performance analysis; Switches; System performance; Telecommunication traffic;

fLanguage

English

Publisher

ieee

Conference_Titel

Computing and Information, 1993. Proceedings ICCI '93., Fifth International Conference on

Conference_Location

Sudbury, Ont.

Print_ISBN

0-8186-4212-2

Type

conf

DOI

10.1109/ICCI.1993.315392

Filename

315392