DocumentCode
1988672
Title
A Compact, Analytical Two-dimensional Threshold Voltage Model for Cylindrical, Fully-depleted, Surrounding-Gate(SG) MOSFETs
Author
Chiang, T.K.
Author_Institution
Department of Electronic Engineering, the Southern Taiwan University of Technology, Taiwan, E-mail: tkchiang@mail.stut.edu.tw
fYear
2005
fDate
19-21 Dec. 2005
Firstpage
547
Lastpage
550
Abstract
Based on two-dimensional(2D) potential analysis, a compact, analytical model for threshold voltage in cylindrical, fully-depleted, surrounding-gate(SG) MOSFETs is derived. The minimum surface potential μmin,surface is used to develop the threshold voltage model. Besides decreasing the characteristic factor, both the thin silicon body and gate oxide can reduce the threshold voltage roll-off simultaneously. It is also found that the threshold voltage shift is dependent on the scaling factor of λ1 L. The high scaling factor is preferred to alleviate threshold voltage degradation.
Keywords
Analytical models; Computational modeling; Degradation; MOSFETs; Numerical simulation; Physics; Semiconductor process modeling; Silicon; Threshold voltage; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2005 IEEE Conference on
Print_ISBN
0-7803-9339-2
Type
conf
DOI
10.1109/EDSSC.2005.1635330
Filename
1635330
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