Title :
Application of piecewise-linear switched-capacitor circuits for random number generation
Author :
Espejo-Meana, Servando ; Martín-Gómez, Juan D. ; Rodríguez-Vázquez, Angel ; Huertas, José L.
Author_Institution :
Dept. Electron. y Electromagn., Sevilla Univ., Spain
Abstract :
An unconventional application of switched-capacitor (SC) circuits is discussed. A systematic method for the design of piecewise-linear (PL) parasitic-insensitive SC chaotic discrete maps is given. A simple circuit which generates a random one-bit digital sequence is reported. Simulation results show that the random behavior is not significantly altered by large (about 5%) variations in the values of the design parameters, which makes monolithic implementation feasible. Simulation results and layout for a 2-μm double-metal CMOS prototype are included
Keywords :
CMOS integrated circuits; binary sequences; chaos; random number generation; switched capacitor networks; 2 micron; double-metal CMOS prototype; layout; monolithic implementation; parasitic-insensitive SC chaotic discrete maps; piecewise-linear switched-capacitor circuits; random behavior; random number generation; random one-bit digital sequence; Chaotic communication; Clocks; Piecewise linear techniques; Random number generation; Signal design; Signal generators; Switched capacitor circuits; Switches; Switching circuits; Virtual prototyping;
Conference_Titel :
Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on
Conference_Location :
Champaign, IL
DOI :
10.1109/MWSCAS.1989.102013
