Simulation on endurance characteristic of charge trapping memory

A comprehensive simulation method for endurance reliability issues in charge trapping memory is developed. For this purpose, a practical algorithm is carefully designed to investigate the cycling performance of charge trapping memory. The models that account for the generation of substrate/tunneling oxide interface trapped charge and oxide trapped charge are incorporated into the simulation. The influence of these models on flat-band voltage evolution under programing/erasing cycling is investigated in detail, thus providing insight into the mechanism of the endurance issues in charge trapping memory.